Kandou AI represents a series a bet on horizontal AI tooling, with none GenAI integration across its product surface.
With foundation models commoditizing, Kandou AI's focus on domain-specific data creates potential for durable competitive advantage. First-mover advantage in data accumulation becomes increasingly valuable as the AI stack matures.
Kandou AI specializes in the design of high-speed, and pin- and energy-efficient chip-to-chip links, SerDes, and associated technologies.
A proprietary Copper MIMO / Chord Signaling physical layer that enables higher effective bandwidth per pin with fewer pins and lower power, paired with a product family (PHY IP + silicon retimers/switches/diagnostics) that is 'silicon proven' and targeted specifically at chiplet-based AI fabrics.
Kandou AI shows strong domain-specialized intellectual property and shipped silicon (Copper MIMO, Chord Signaling, chiplet-based fabrics, retimers, PHY IP). While the content does not reference proprietary training datasets, the company’s proprietary hardware IP, silicon volume, and domain expertise constitute a vertical competitive moat that could be leveraged to collect specialized telemetry, partner integrations, and product-specific data over time.
Unlocks AI applications in regulated industries where generic models fail. Creates acquisition targets for incumbents.
Academic/industry leader in signal processing and high-speed interconnect technologies; founder of Kandou; involved in advanced signaling concepts (Chord signaling) and copper MIMO interconnects
Previously: Kandou (founder)
Strong alignment between Amin Shokrollahi's domain expertise in high-speed interconnects and Kandou AI's mission to democratize AI infrastructure; CEO appointment (Srujan Linga) suggests a push toward scale and execution, but public signals about broader leadership depth and traction are limited.
sales led
Target: enterprise
custom
field sales
• >20 million silicon units shipped powered by Kandou AI technology
• Focus on AI hardware ecosystem and chiplet-based designs
Provide high-bandwidth, energy-efficient data movement for AI hardware ecosystems via Copper MIMO-based AI fabric and related PCIe/USB4 interconnects.
Applying a chiplet-first fabric specifically optimized for AI workloads (with a dedicated copper MIMO physical layer) is a relatively uncommon architectural move in the AI infrastructure space, which is typically dominated by large monolithic GPUs, proprietary interposer solutions, or optical fabrics. The explicit goal of >10x cost reduction for AI systems by rethinking data movement is a strong, unusual product-driven architectural direction.
Using MIMO concepts (common in wireless/macro communications) in wired chip interconnects to scale bandwidth and reach is a cross-domain innovation; it allows leveraging commodity copper infrastructure rather than fully shifting to optics for many AI fabric use-cases, which can dramatically lower cost and simplify thermal/repair considerations.
Near-package optics with a field-repair focus addresses operational challenges (thermal management, repair/MTTR) that are often secondary in pure performance-focused designs. Combining this with a copper-first interconnect fabric is a pragmatic architecture to balance cost, performance and serviceability in data center AI racks.
Kandou AI operates in a competitive landscape that includes Broadcom, Marvell, Intel (and its silicon/IP efforts around CXL/EMIB/packaging).
Differentiation: Kandou AI differentiates by promoting a Copper MIMO / Chord Signaling approach that claims fewer pins, lower power and chip-to-chip links optimized for chiplet-based AI fabrics; Kandou emphasizes silicon-proven units shipped and a product family spanning PHY IP, retimers, switches and diagnostics focused on AI cost reduction.
Differentiation: Marvell typically offers monolithic SoC and discrete PHY solutions; Kandou positions a differentiated copper MIMO physical layer and chiplet AI fabric approach intended to extend copper reach and reduce system cost through pin- and energy-efficiency.
Differentiation: Intel is a platform and foundry-scale player focused on holistic stack and packaging approaches; Kandou markets a discrete IP + silicon product set (retimers, PHY IP, switches) based on Copper MIMO intended to enable lower-cost, scalable AI fabrics across vendors.
Copper MIMO as a primary fabric — Kandou AI is betting on a spatial-multiplexing approach (Copper MIMO / Chord signaling) across multiple copper differential pairs instead of continuing to push higher-order PAM SerDes. This is unusual because most industry scaling has been through PAM-N amplitude signaling, complex analog front-ends, and more aggressive equalization rather than treating copper as a MIMO channel that leverages DSP to separate spatial streams.
Chord signaling / Glasswing PHY claim — they position Chord signaling as a PHY-level multi-wire encoding that reduces pin count and power while increasing bits-per-pin. That looks like a coordinated encoding + equalization scheme across several physical wires (akin to multi-wire coding in communications) rather than incremental SerDes improvements — an architectural departure from standard single-channel PAM/NRZ/ML-based PHY design.
Chiplet-first AI fabric stack — instead of selling only PHY IP or retimers, Kandou AI is packaging an end-to-end chiplet fabric concept: PHY IP (Glasswing), retimers (Regli, Matterhorn), a PCIe switch (Zetti), diagnostics (Besso), and a chiplet-based AI fabric product. Bundling silicon IP, retimers and switch-level products signals a system-level architecture aimed at disaggregated compute/memory fabrics rather than point products.
Hybrid electrical + repairable near-package optics (NPO) — the Field Repairable Near Package Optics claim is a non-obvious combination of optics and packaging: pushing optics very near the package for thermal/latency benefits while making them field-replaceable to address MTTR and reliability. That confronts a classic optics drawback (hard-to-repair optics in dense packages) with a mechanical/service-oriented solution.
Standards-forward retimer approach — supporting PCIe 5.0 / CXL 2.0 and USB4 retimers suggests Kandou is engineering extremely low-latency, low-BER retiming solutions that must remain transparent to strict protocol timing and training sequences. Delivering retimers that preserve CXL semantics while implementing MIMO-like link layers is technically demanding and atypical for a firm focused on novel PHYs.
If Kandou AI achieves its technical roadmap, it could become foundational infrastructure for the next generation of AI applications. Success here would accelerate the timeline for downstream companies to build reliable, production-grade AI products. Failure or pivot would signal continued fragmentation in the AI tooling landscape.
“Mentions of artificial intelligence and AI in general, e.g., 'artificial general intelligence' and 'AI will power the next era', but no specific GenAI models or services are named.”
“There is emphasis on AI hardware and connectivity (Copper MIMO interconnects, AI fabric solutions) rather than generation or prompting of content.”
“No references to LLMs, GPT, Claude, embeddings, RAG, agents, or fine-tuning.”
“Copper Multiple Input Multiple Output (MIMO) wired interconnect as a foundational connectivity technology for AI hardware.”
“Chiplet-based AI Fabric solutions built around copper MIMO links (hardware-centric fabric approach versus purely software/ML stacks).”
“Chord™ Signaling and Glasswing™ PHY — signaling/PHY-level innovations to reduce pins/power and increase bandwidth.”
